Translating network models to parallel hardware in NEURON (Hines and Carnevale 2008)

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Accession:96444
Shows how to move a working network model written in NEURON from a serial processor to a parallel machine in such a way that the final result will produce numerically identical results on either serial or parallel hardware.
Reference:
1 . Hines ML, Carnevale NT (2008) Translating network models to parallel hardware in NEURON. J Neurosci Methods 169:425-55 [PubMed]
Model Information (Click on a link to find other models with that property)
Model Type: Realistic Network;
Brain Region(s)/Organism:
Cell Type(s):
Channel(s):
Gap Junctions:
Receptor(s):
Gene(s):
Transmitter(s):
Simulation Environment: NEURON;
Model Concept(s): Simplified Models; Methods;
Implementer(s): Carnevale, Ted [Ted.Carnevale at Yale.edu]; Hines, Michael [Michael.Hines at Yale.edu];
 
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HinesCarnevaleJNM2007
                            
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